Space is running out.
We hit the wall. Moore’s Law didn’t die gracefully—it just stopped working when the bill for the next factory topped a billion dollars. So, Huawei decided to change the subject. Not the hardware itself, but how we measure it.
At the ISCAS conference in May 2026, He Tingbo stepped up and dropped a new roadmap. It’s called the Tau ($\tau$) Scaling Law.
It’s simple in concept. Forget shrinking. Start speeding up.
The metric matters
For fifty years we shrank transistors. Smaller was faster. Cheaper was better. Until it wasn’t. The cost to design a single advanced chip has exploded, yet performance gains have stalled. We squeezed the space until nothing left could be squeezed.
Huawei says the fix isn’t geometry. It’s physics. specifically signal propagation.
Tau is the time it takes for a signal to move. A delay. A pause in the flow of information.
Compressing $\tau$ across the whole stack is the goal.
It applies to the tiny transistor and the massive data center alike. Less delay means more compute. No need to beg the latest EUV lithography machine to make things smaller. Just make things quicker.
LogicFolding: stack it
They call the method LogicFolding. It’s vertical. You pile digital logic, analog circuits, and memory into active layers stacked on top of each other.
The results so far? A 55% jump in density. Energy efficiency up 41%.
All without changing the manufacturing process node. Just the design.
Kirin chips are next. Here is the clock ticking:
- 2026: 3.1 GHz cores hit the market.
- 2027: 3.39 GHz.
- 2028: 3.71 GHz.
- 2029: 4 GHz.
By 2031 they claim the density will match a 1.4 nm process. Even if we aren’t physically at that lithographic limit. It’s density equivalence, achieved by folding rather than shrinking.
Breaking the fan-out wall
AI hits a different wall. Perimeters are small. Surface areas are large. When you pack enough chips together for AI training, you run out of room to move data and power. It’s the fan-out dilemma.
Huawei moves resources onto the surface. They use 3D folding to let scaling grow with area instead of circumference.
Two tools drive this. UnifiedBus (UB) cuts remote latency from microseconds down to 100 nanoseconds roughly. That is an order of magnitude difference in feel alone. Then there’s Hi-ONE, an optical engine. 8 Tb/s of bandwidth. It shrinks SerDes distance to 5 cm while letting panels talk to each other across 100 meters.
The Ascend line will adopt this slowly.
The 950 model launches in 2026 using 2.5D stacking. The 990 waits for 30 full logic folding. It is a slow roll-out but the timeline is set.
Open or bust?
He Tingbo was blunt. One company can’t do it.
“No single company can independently find all.”
She is right. We’ve mass produced 381 variants already based on this. Six years of work. But the leap needed is huge. A hundred times growth by 2035?
It won’t happen in a silo. The Tau Law needs global engineers to adopt the metric. If they don’t the stack collapses.
Or maybe not. Maybe time will wait.
